Decades of demoscene productions beg to differ. That just means compilers are aw...

snvzz · 2026-03-12T08:12:56 1773303176

In absence of better data, we have to compare compiler output.

userbinator · 2026-03-13T01:44:43 1773366283

Here is your "better data": https://web.eece.maine.edu/~vweaver/papers/iccd09/ll_documen...

sitharus · 2026-03-13T04:29:59 1773376199

If I recall my lectures, which were 20odd years ago now.

CISC ISAs were historically designed for humans writing assembly so they have single instructions with complex behaviour and consequently very high instruction density.

RISC was designed to eliminate the complex decoding logic and replace it with compiler logic, using higher throughput from the much reduced decoding logic (or in some cases no decoding at all) to offset the increased number of instructions. Also the transistors that were used for decoding could be used for additional ALUs to increase parallelism.

So RISC by its nature is more verbose.

Does the tradeoff still make sense? Depends who you ask.

snvzz · 2026-03-13T12:18:32 1773404312

From 2017, it predates RISC-V first ratified spec.

Currently, RISC-V holds the crown of code density in both 64 and 32 bit.

On 32bit, thumb2 is a little behind. On 64bit, x86-64 is not even close, and ARMv8/v9 are even worse.

userbinator · 2026-03-13T19:21:20 1773429680

You've shown absolutely zero evidence.

"Maybe if I keep repeating it, it'll be true."

snvzz · 2026-03-14T09:08:52 1773479332

I am sure you are capable of running a compiler and/or running `size` on Ubuntu binaries.